since a cache memory system can reduce the need for main memory access, it greatly reduces the potential memory access contention in shared memory multiprocessor systems 可以把cache看成是主存与cpu之间的缓冲适配器,借助于cache,可以高效地完成dram内存和cpu之间的速度匹配。
in order to give simulation about the performance of system with router-caches, we set up a new simulator after giving necessary revision on the rsim simulator ( a simulator for shared memory multiprocessors system ) designed by rice university 为了对采用路由器cache的多处理器系统的性能进行模拟,我们选择以美国rice大学的rsim共享主存多处理器系统模拟器为基础,对其进行适当修改,建立了用于模拟含路由器cache的多处理器系统的模拟器。